1. Field of the Invention
The present invention relates to a system that reduces unwanted oscillations in high speed (e.g., 10 GHz baud rates), high gain or high transimpedance amplifiers that are located in integrated circuits (ICs).
2. Background Art
Transimpedance amplifiers (TIAs) and limiting amplifiers (LAs) are used in optical receivers as front end stages to convert photodetector signal currents to voltage output, which is then fed to a clock and data recovery (CDR) circuit. For high speed (e.g., implementation at 10 GHz baud rate) designs, getting high values of gains and transimpedance (e.g., about 45 dB of transimpedance, about 60 dB of gain, so net transimpedance of about 105 dB) at these signal frequencies in a single integrated circuit chip exposes the chip to phenomenal risk of unwanted oscillations through several parasitic mechanisms.
Therefore, what is needed is an amplifier portion on an IC chip that substantially reduces all parasitic feedback coupling paths, thus substantially reduces all unwanted oscillations. This will reduce adverse effects on the input signal caused by the unwanted oscillations, such that the input signal is not drowned out by voltage along the coupling feedback paths.